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DATA SHEET DATA SHEET
BIPOLAR ANALOG INTEGRATED CIRCUIT
PC8110GR
1 GHz DIRECT QUADRATURE MODULATOR FOR DIGITAL MOBILE COMMUNICATION
DESCRIPTION
The PC8110GR is a sillicon monolithic integrated circuit designed as 1 GHz direct quadrature modulator for digital mobile communication systems. This modulator housed in a 20 pin plastic SSOP that easy to install and contributes to miniaturizing the system. The device has power save function and can operates 2.7 to 3.6 V supply voltage to realize low power consumption.
FEATURES
* Direct modulation range : 800 MHz to 1 GHz * Supply voltage range * Low operation current : VCC = 2.7 to 3.6 V : ICC = 24 mA typical @ VCC = 3 V
* Low phase difference due to digital phase shifter is adopted. * 20 pin SSOP suitable for high density surface mounting. * Low current sleep mode
APPLICATION
* Digital cellular phone (PDC, IS-54/IS-136, GSM etc..)
ORDERING INFORMATION
PART NUMBER PACKAGE 20 pin plastic SSOP PACKING FORM Carrier tape width 12 mm. Q'ty 2.5 kp/Reel Pin 1 indicated pull-out direction of tape.
PC8110GR-E1
Remark
For evaluation sample order, please contact your local NEC sales office. (Order number: PC8110GR)
Caution electro-static sensitive device
The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for availability and additional information.
Document No. P11074EJ3V0DS00 (3rd edition) Date Published October 1999 N CP(K) Printed in Japan
The mark
shows major revised points.
(c)
1996, 1999
PC8110GR
INTERNAL BLOCK DIAGRAM AND PIN CONNECTIONS (Top View)
1 2 3 4 5 6 7 8 9 10 90 Phase Sitter REG.
20 19 18 17 16 15 14 13 12 11 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 15. 16. 17. 18. 19. 20. LOin GND LOin GND Q-INPUT Q-INPUT I-INPUT I-INPUT GND GND RFout GND GND VCC GND GND Power Save (VPS) GND VCC GND
SERIES PRODUCTS
PART NUMBER f LO1in (MHz) 100 to 300 f MODout (MHz) 50 to 150 f I/Q (MHz) DC to 0.5 DC to 10 DC to 10 Up-Converter f RFout (MHz) External
SERIES TYPE 150 MHz Quadrature MOD Up-Con+Quadrature MOD 400 MHz Quadrature MOD 1 GHz direct Quad MOD
APPLICATION CT2, Digital Comm.
PC8101GR PC8104GR PC8105GR PC8110GR
100 to 400 100 to 400
900 to 1900 External
PHS, PDC etc.. PDC, IS-136, GSM, PHS PDC, IS-136, GSM etc.
800 to 1000
DC to 10
Direct
Remark
As for detail information of series products, please refer to each data sheet.
2
Data Sheet P11074EJ3V0DS00
PC8110GR
APPLICATION EXAMPLE PDC 900 MHz (Direct Modulation Type)
DEMO I Q RSSI OUT
ANT RX RSSI
SW PLL
TX PA BPF
0 F/F 90
I
Q 900 MHz Direct Quadrature Modulator PC8110GR
ABSOLUTE MAXIMUM RATINGS
PARAMETER Supply Voltage Power Save Voltage Power Dissipation Operating Temperature Storage Temperature SYMBOL VCC VPS PD Topt Tstg RATING 4.0 4.0 430 -40 to +85 -55 to +150 UNIT V V mW C C TA = +25 C TA = +25 C TA = +85 C
Note 1
TEST CONDITIONS
Note 1.
Mounted on 50 x 50 x 1.6 mm double copper clad epoxy glass board
RECOMMENDED OPERATING CONDITIONS
PARAMETER Supply Voltage Operating Temperature LO Input Frequency LO Input Power Level I/Q Input Frequency I/Q Input Voltage SYMBOL VCC Topt fLOin PLOin fI/Qin VI/Qin MIN. 2.7 -40 800 -15 DC TYP. 3.0 +25 900 -10 MAX. 3.6 +85 1000 -7 10 500 250 UNIT V C MHz dBm MHz mVp-p Single ended input Differential input TEST CONDITIONS
Data Sheet P11074EJ3V0DS00
3
PC8110GR
ELECTRICAL CHARACTERISTICS (TA = 25 C, VCC = 3.0 V, Unless Otherwise Specified VPS 2.2 V (High))
PARAMETER Circuit Current Circuit Current at Power Save Mode Maximum Output Power LO Carrier Leak Image Rejection (Side Band Leak) I/Q 3rd Order Intermodulation Distortion Power Save Rise Time Power Save Fall Time SYMBOL ICC ICC(PS) Po(sat) LoL ImR IM3I/Q -13 -10 -35 -40 -45 -30 -30 -30 MIN. 20 TYP. 24 MAX. 33 10 UNIT mA uA dBM dBc dBc dBc TEST CONDITIONS No input signal VPS 0.5 V (Low) fLOin = 948 MHz PLOin = -10 dBm fI/Q = 2.625 kHz I/Q (DC) = VCC/2 VI/Qin = 500 mVp-p (Single ended) VPS: Low High VPS: High Low
TPS(RISE) TPS(FALL)
3 2
5 5
s s
STANDARD CHARACTERISTICS FOR REFERENCE (TA = +25 C, VCC = 3.0 V, Unless Otherwise Specified VPS 2.2 V (Hgih))
PARAMETER I/Q Input Impeadance LO Input VSWR RF Output VSWR SYMBOL ZI/Qin VSWR (Lo) VSWR (RF) MIN. TYP. 150 1.5 : 1 1.5 : 1 MAX. UNIT k - - TEST CONDITIONS fI/Q = DC to 10 MHz fLO = 948 MHz fLO = 948 MHz
4
Data Sheet P11074EJ3V0DS00
PC8110GR
PIN EXPLANATION
Pin No. 1 SUPPLY VOL. (V) PIN VOL. (V) 2.6
ASSIGNMENT LOin
FUNCTION AND APPLICATION LO input for phase shifter. Connect around 50 between 1 and 3 pin to match to 50 . Connect to the ground with minimum inductance. Track length should be kept as short as possible. Bypass of LO input. This pin is grounded through around 33 pF capacitor. Input for Q signal. This input impedance is 150 k. In case of that I/Q input signals are single ended, amplitude of the signal is 500 mVp-p max. Note 2 Input for Q signal. This input impedance is 150 k. In case of that I/Q input signals are single ended, VCC/2 biased DC signal should be input. In case of that I/Q input signals are differential, amplitude of the signal is 250 mVp-p max. Note 2 Input for I signal. This input impedance is 150 k. In case of that I/Q input signals are single ended, VCC/2 biased DC signal should be input. In case of that I/Q input signals are differential, amplitude of the signal is 250 mVp-p max. Note 2 Input for I signal. This input impedance is 150 k. In case of that I/Q input signals are single ended, amplitude of the signal is 500 mVp-p max. Note 2 Connect to the ground with minimum inductance. Track length should be kept as short as possible.
5
EQUIVALENT CIRCUIT
2 18 3
GND (for Local Amp. Block)
0
1
3
LOin
2.6
5
Q
VCC/2
6
Q
VCC/2
6
7
I
VCC/2
8
7
8
I
VCC/2
9 13 16
GND (for Quadrature Modulator Block)
0
Data Sheet P11074EJ3V0DS00
5
PC8110GR
Pin No. 11
ASSIGNMENT RFout
SUPPLY VOL. (V)
PIN VOL. (V) 1.6
FUNCTION AND APPLICATION Output from modulator. This is single-end push-pull amplifier. So this output impedance is Low. Connect to the ground with minimum inductance. Track length should be kept as short as possible. Supply voltage pin for Output Amplifier of modulator. Internal regulator can be kept stable condition of supply bias against the variable temperature or VCC. Power save control pin can be controlled ON/SLEEP state with bias as follows; VP/S 2.2 to 3.6 0 to 0.5 STATE ON SLEEP
EQUIVALENT CIRCUIT
12
GND (for Output Push-pull Amplifier) VCC (for Output Amplifier of Modulator)
0
From Modulator 11
14
2.7 to 3.6
17
Power Save
VP/S
17
19
VCC
2.7 to 3.6
Supply voltage pin for modulator except output Amplifier. Internal regulator can be kept stable condition of supply bias against the variable temperature or VCC. Connect to the ground with minimum inductance. Track length should be kept as short as possible.
4 10 15 20
GND
0
Note 2.
Relations between amplitude and VCC/2 bias of input signal are following.
PI/Qin - I/Q Input Signal - mVp-p
Supply Voltage VCC (V) 2.7 to 3.6
I/Q DC Voltage (V) VCC/2 = I = I = Q = Q 1.35 to 1.8
Single ended input I=Q 500
Differential input I=I=Q=Q 250
6
Data Sheet P11074EJ3V0DS00
PC8110GR
EXPLANATION OF INTERNAL FUNCTION
BLOCK 90 PHASE SHIFTER FUNCTION/OPERATION Input signal from LO is send to digital circuit of T-type flip-flop through frequency doubler. Output signal from T-type F/F is changed to same frequency as LO input and that have quadrature phase shift, 0 , 90 , 180 , 270 . These circuits have function of self phase correction to make correctly quadrature signals. Buffer amplifiers for each phase signals to send to each mixers. BLOCK DIAGRAM
from LOin
x2
/ 2 F/F
BUFFER AMP.
MIXER
Each signals from buffer amp. are quadrature modulated with two double-balanced mixers. High accurate phase and amplitude inputs are realized to good performance for image rejection. Output signals from each mixers are added with adder and send to final amplifier.
I I Q Q
ADDER
to MODout
Data Sheet P11074EJ3V0DS00
7
PC8110GR
TYPICAL CHARACTERISTICS Unless otherwise specified TA = +25 C, VCC = VPS = 3 V, I/Q DC/offset = I/Q DC offset = 1.5 V, I/Q Input signal = 500 mVp-p (Single ended), fI/Q = 2.625 kHz, fLOin = 948 MHz, PLOin = -10 dBm, Transmission speed: 42 kbps, RNYQ: a = 0.5.
CIRCUIT CURRENT vs SUPPLY VOLTAGE
30 TA = +25 C TA = -40 C TA = +85 C VCC = VPS I/Q (DC) = VCC/2 RF None
25
ICC - Circuit Current - mA
20
15
10
5
0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
VCC - Supply Voltage - V CIRCUIT CURRENT vs POWER SAVE VOLTAGE
30 TA = +25 C TA = -40 C TA = +85 C VCC = 3 V I/Q (DC) = 1.5 V RF None
25
ICC - Circuit Current - mA
20
15
10
5
0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
VPS - Power Save Voltage - V
8
Data Sheet P11074EJ3V0DS00
PC8110GR
RF OUTPUT POWER vs I/Q INPUT SIGNAL (at TA = -40 C) 0 VCC = 3.0 V VCC = 2.7 V VCC = 3.6 V Single ended -5 -5 RF OUTPUT POWER vs I/Q INPUT SIGNAL (at TA = +25 C) 0 VCC = 3.0 V VCC = 2.7 V VCC = 3.6 V Single ended
PRFout - RF Output Power - dBm
-10
PRFout - RF Output Power - dBm
100 200 300 400 500
-10
-15
-15
-20
-20
-25
-25 100 200 300 400 500
PI/Qin - I/Q Input Signal - mVp-p
PI/Qin - I/Q Input Signal - mVp-p
RF OUTPUT POWER vs I/Q INPUT SIGNAL (at TA = +85 C) 0 VCC = 3.0 V VCC = 2.7 V VCC = 3.6 V Single ended -5
PRFout - RF Output Power - dBm
-10
-15
-20
-25 100 200 300 400 500
PI/Qin - I/Q Input Signal - mVp-p
Data Sheet P11074EJ3V0DS00
9
PC8110GR
Lo INPUT FREQUENCY vs PRFout, LoL, ImR, IM3I/Q (at VCC = 2.7 V, TA = -40 C) -30
LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc
Lo INPUT FREQUENCY vs PRFout, LoL, ImR, IM3I/Q (at VCC = 3.0 V, TA = -40 C) -5
LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc
Lo INPUT FREQUENCY vs PRFout, LoL, ImR, IM3I/Q (at VCC = 3.6 V, TA = -40 C) -5 -30
LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc
-30 PRFout -35
-5 LoL
-35 PRFout -40
LoL
-10
PRFout - RF Output Power - dBm
-10
PRFout - RF Output Power - dBm
-35 PRFout -40
-10
PRFout - RF Output Power - dBm PRFout - RF Output Power - dBm
LoL -40 -15
-15
-15
-45
IM3I/Q
-20
-45
IM3I/Q
-20
-45
IM3I/Q
-20
-50 ImR -55 700 800 900 1000 1100
-25
-50 ImR -55 700 800 900 1000 1100
-25
-50 ImR -55 700 800 900 1000 1100
-25
-30
-30
-30
fLO - Local Input Frequency - MHz
fLO - Local Input Frequency - MHz
fLO - Local Input Frequency - MHz
Lo INPUT FREQUENCY vs PRFout, LoL, ImR, IM3I/Q (at VCC = 2.7 V, TA = +25 C) -30
LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc
Lo INPUT FREQUENCY vs PRFout, LoL, ImR, IM3I/Q (at VCC = 3.0 V, TA = +25 C) -5
LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc
Lo INPUT FREQUENCY vs PRFout, LoL, ImR, IM3I/Q (at VCC = 3.6 V, TA = +25 C) -5
LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc
-30 PRFout -35
-30 PRFout -35
-5
PRFout -35 -10
PRFout - RF Output Power - dBm
-10
PRFout - RF Output Power - dBm
-10
-40 LoL
-15
-40
LoL IM3I/Q
-15
-40
LoL IM3I/Q
-15
-45 IM3I/Q -50 ImR -55 700 800 900 1000 1100
-20
-45
-20
-45
-20
-25
-50
-25
-50
-25
-30
-55
ImR 700 800 900 1000 1100
-30
-55
ImR 700 800 900 1000 1100
-30
fLO - Local Input Frequency - MHz
fLO - Local Input Frequency - MHz
fLO - Local Input Frequency - MHz
10
Data Sheet P11074EJ3V0DS00
PC8110GR
Lo INPUT FREQUENCY vs PRFout, LoL, ImR, IM3I/Q (at VCC = 2.7 V, TA = +85 C) -30
LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc
Lo INPUT FREQUENCY vs PRFout, LoL, ImR, IM3I/Q (at VCC = 3.0 V, TA = +85 C) -5
LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc
Lo INPUT FREQUENCY vs PRFout, LoL, ImR, IM3I/Q (at VCC = 3.6 V, TA = +85 C) -5
LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc
-30
-30
-5
LoL -35 -10
PRFout - RF Output Power - dBm
-35 PRFout -40 IM3I/Q -45
PRFout - RF Output Power - dBm
PRFout -40 IM3I/Q -45 ImR -20 -15
PRFout -40 IM3I/Q -45 -20 -15
-15
ImR
-20
-50
-25
-50 ImR -55 700 800 900 1000 1100
-25
-50
-25
-55 700 800 900 1000 1100
-30
-30
-55 700 800 900 1000 1100
-30
fLO - Local Input Frequency - MHz
fLO - Local Input Frequency - MHz
fLO - Local Input Frequency - MHz
Lo INPUT POWER vs PRFout, LoL, ImR, IM3I/Q (at VCC = 2.7 V, TA = -40 C) -30
LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc
Lo INPUT POWER vs PRFout, LoL, ImR, IM3I/Q (at VCC = 3.0 V, TA = -40 C) -30
LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc
Lo INPUT POWER vs PRFout, LoL, ImR, IM3I/Q (at VCC = 3.6 V, TA = -40 C) -5
LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc
LoL
-5
LoL
-30
LoL
-5
-35 PRFout -40
-10
PRFout - RF Output Power - dBm
-35 PRFout -40
-10
PRFout - RF Output Power - dBm
-35 PRFout -40 ImR -45
-10
PRFout - RF Output Power - dBm
-15
-15
-15
ImR -45 -20
ImR -45 -20
-20
-50 IM3I/Q
-25
-50 IM3I/Q
-25
-50 IM3I/Q
-25
-55 -15 -10 -5
-30
-55 -15 -10 -5
-30
-55 -15 -10 -5
-30
LO - Local Input Power - dBm
LO - Local Input Power - dBm
LO - Local Input Power - dBm
Data Sheet P11074EJ3V0DS00
11
PRFout - RF Output Power - dBm
LoL
-10
-35
LoL
-10
PC8110GR
Lo INPUT POWER vs PRFout, LoL, ImR, IM3I/Q (at Vcc = 2.7 V, TA = +25 C) -30
LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc
Lo INPUT POWER vs PRFout, LoL, ImR, IM3I/Q (at Vcc = 3.0 V, TA = +25 C) -5
LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc
Lo INPUT POWER vs PRFout, LoL, ImR, IM3I/Q (at Vcc = 3.6 V, TA = +25 C) -5
LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc
-30 PRFout -35
-30 PRFout -35
-5
PRFout -35 -10
PRFout - RF Output Power - dBm
-10
PRFout - RF Output Power - dBm
-10
PRFout - RF Output Power - dBm PRFout - RF Output Power - dBm
-40 ImR -45
LoL
-15
-40
LoL ImR
-15
-40
LoL ImR
-15
-20
-45
-20
-45
-20
-50 IM3I/Q
-25
-50 IM3I/Q
-25
-50 IM3I/Q
-25
-55 -15 -10 -5
-30
-55 -15 -10 -5
-30
-55 -15 -10 -5
-30
LO - Local Input Power - dBm
LO - Local Input Power - dBm
LO - Local Input Power - dBm
Lo INPUT POWER vs PRFout, LoL, ImR, IM3I/Q (at Vcc = 2.7 V, TA = +85 C) -30
LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc
Lo INPUT POWER vs PRFout, LoL, ImR, IM3I/Q (at Vcc = 3.0 V, TA = +85 C) -5
LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc
Lo INPUT POWER vs PRFout, LoL, ImR, IM3I/Q (at Vcc = 3.6 V, TA = +85 C) -5 -30
LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc
-30 LoL -35
-5 LoL
LoL -35 -10
PRFout - RF Output Power - dBm
-10
PRFout - RF Output Power - dBm
-35 PRFout -40 ImR
-10
PRFout -40 -15
PRFout -40 -15
-15
ImR -45 -20
ImR -45 -20
-45
-20
-50 IM3I/Q -55 -15 -10 -5
-25
-50 IM3I/Q -55 -15 -10 -5
-25
-50 IM3I/Q
-25
-30
-30
-55 -15 -10 -5
-30
LO - Local Input Power - dBm
LO - Local Input Power - dBm
LO - Local Input Power - dBm
12
Data Sheet P11074EJ3V0DS00
PC8110GR
I/Q BIASE VOLTAGE vs PRFout, LoL, ImR, IM3I/Q (at VCC = 2.7 V, TA = -40 C) -30
LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc
I/Q BIASE VOLTAGE vs PRFout, LoL, ImR, IM3I/Q (at VCC = 3.0 V, TA = -40 C) -5
LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc
I/Q BIASE VOLTAGE vs PRFout, LoL, ImR, IM3I/Q (at VCC = 3.6 V, TA = -40 C) -5
LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc
-30 PRFout -35 LoL -40
-30 LoL -35 PRFout
-5
PRFout -35 -10
PRFout - RF Output Power - dBm
-10
PRFout - RF Output Power - dBm
-10
PRFout - RF Output Power - dBm
-40
LoL
-15
-15
-40
-15
-45
ImR
-20
-45
ImR
-20
-45
ImR
-20
-50 IM3I/Q
-25
-50
IM3I/Q
-25
-50
IM3I/Q
-25
-55 1.25 1.35 1.45
-30
-55 1.4 1.5 1.6
-30
-55 1.7 1.8 1.9
-30
I/Q (DC) - I/Q Supply Voltage - V
I/Q (DC) - I/Q Supply Voltage - V
I/Q (DC) - I/Q Supply Voltage - V
I/Q BIASE VOLTAGE vs PRFout, LoL, ImR, IM3I/Q (at VCC = 2.7 V, TA = +25 C) -30
LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc
I/Q BIASE VOLTAGE vs PRFout, LoL, ImR, IM3I/Q (at VCC = 3.0 V, TA = +25 C) -5
LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc
I/Q BIASE VOLTAGE vs PRFout, LoL, ImR, IM3I/Q (at VCC = 3.6 V, TA = +25 C) -5
LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc
-30 PRFout -35
-30 PRFout -35
-5
PRFout -35 -10
PRFout - RF Output Power - dBm
-10
PRFout - RF Output Power - dBm
-10
PRFout - RF Output Power - dBm
-40 LoL -45 ImR
-15
-40
LoL ImR
-15
-40
LoL
-15
ImR -45 -20
-20
-45
-20
-50
IM3I/Q
-25
-50
IM3I/Q
-25
-50
IM3I/Q
-25
-55 1.25 1.35 1.45
-30
-55 1.4 1.5 1.6
-30
-55 1.7 1.8 1.9
-30
I/Q (DC) - I/Q Supply Voltage - V
I/Q (DC) - I/Q Supply Voltage - V
I/Q (DC) - I/Q Supply Voltage - V
Data Sheet P11074EJ3V0DS00
13
PC8110GR
I/Q BIASE VOLTAGE vs PRFout, LoL, ImR, IM3I/Q (at VCC = 2.7 V, TA = +85 C) -30
LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc
I/Q BIASE VOLTAGE vs PRFout, LoL, ImR, IM3I/Q (at VCC = 3.0 V, TA = +85 C) -5
LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc
I/Q BIASE VOLTAGE vs PRFout, LoL, ImR, IM3I/Q (at VCC = 3.6 V, TA = +85 C) -5
LoL - Local Ieak, ImR - Image Rejection, IM3I/Q - dBc
-30 PRFout -35
-30 LoL -35 PRFout
-5
-35
-10
PRFout - RF Output Power - dBm
-10
PRFout - RF Output Power - dBm
-10
PRFout - RF Output Power - dBm
PRFout -40
LoL
LoL -40 -15
-15
-40 ImR -45
-15
-45
ImR
-20
-45
ImR
-20
-20
-50 IM3I/Q -55 1.25 1.35 1.45
-25
-50 IM3I/Q -55 1.4 1.5 1.6
-25
-50 IM3I/Q
-25
-30
-30
-55 1.7 1.8 1.9
-30
I/Q (DC) - I/Q Supply Voltage - V
I/Q (DC) - I/Q Supply Voltage - V
I/Q (DC) - I/Q Supply Voltage - V
14
Data Sheet P11074EJ3V0DS00
PC8110GR
TYPICAL SINE WAVE MODULATION OUTPUT SPECTRUM 42 kbps, RNYQ = 0.5, MOD Pattern [0000] REF 0.0 dBm 10 dB/ MKR -10.50 kHz ATT 10 dB A_write B_blank Pout TYPICAL /4DQPSK MODULATION OUTPUT SPECTRUM 42 kbps, RNYQ = 0.5, MOD Pattern [PN9]
*
LOL 1 IM3I/Q ImR 2 3
MARKER -10.50 kHz -47.36 dB
REF Level 0 dBm 10 dB/
ADJ BS 21 kHz 1 RBW 3 kHz VBW 3 kHz SWP 5 s
2
3 4
RBW 300 Hz VBW 300 Hz SWP 1.2 s CENTER 948.00000 MHz SPAN 50.0 kHz
CENTER 948 MHz Padj (dB) Marker No.1 : 947.90 MHz No.2 : 947.95 MHz No.3 : 948.05 MHz No.4 : 948.10 MHz
SPAN 500 kHz -78.0 dB -67.0 dB -70.3 dB -77.8 dB f = -100 kHz f = -50 kHz f = +50 kHz f = +100 kHz
Data Sheet P11074EJ3V0DS00
15
PC8110GR
POWER SAVE RESPONSE (at VCC = VPS = 2.7 V) REF 0.0 dBm 10 dB/ MKR 2.714 s ATT 10 dB A_view B_blank MARKER 2.714 s 44.41 dB REF 0.0 dBm 10 dB/ MKR 2.714 s POWER SAVE RESPONSE (at VCC = VPS = 3.0 V) ATT 10 dB A_view B_blank MARKER 2.714 s 48.97 dB
RBW 3 MHz VBW 3 MHz SWP 50 s
CENTER 948.002642 MHz
SPAN 0 Hz
RBW 3 MHz VBW 3 MHz SWP 50 s
CENTER 948.002642 MHz
SPAN 0 Hz
POWER SAVE RESPONSE (at VCC = VPS = 3.6 V) REF 0.0 dBm 10 dB/ MKR 2.714 s ATT 10 dB A_view B_blank MARKER 2.714 s 45.97 dB
RBW 3 MHz VBW 3 MHz SWP 50 s
CENTER 948.002642 MHz
SPAN 0 Hz
16
Data Sheet P11074EJ3V0DS00
PC8110GR
LO INPUT (LOin) IMPEDANCE
VCC = VPS = 2.7 V VCC = VPS = 3.0 V
1 : 30.055
7.1015 1.1922 nH 948.000 000 MHz MARKER 1 948 MHz
1 : 30.191
7.1309 1.1872 nH 948.000 000 MHz
MARKER 1 948 MHz 1
1
START 700.000 000 MHz
STOP 1 100.000 000 MHz
START 700.000 000 MHz
STOP 1 100.000 000 MHz
VCC = VPS = 3.6 V
1 : 30.189
7.001 1.1754 nH 948.000 000 MHz
MARKER 1 948 MHz 1
START 700.000 000 MHz
STOP 1 100.000 000 MHz
Data Sheet P11074EJ3V0DS00
17
PC8110GR
RF OUTPUT (RFout) IMPEDANCE
VCC = VPS = 2.7 V VCC = VPS = 3.0 V
1 : 45.74
-2.8633 56.634 pF 948.000 000 MHz MARKER 1 948 MHz
1 : 45.005
-2.6352 59.199 pF 948.000 000 MHz
MARKER 1 948 MHz
1
1
START 700.000 000 MHz
STOP 1 100.000 000 MHz
START 700.000 000 MHz
STOP 1 100.000 000 MHz
VCC = VPS = 3.6 V
1 : 45.925
-2.6719 62.834 pF 948.000 000 MHz
MARKER 1 948 MHz
1
START 700.000 000 MHz
STOP 1 100.000 000 MHz
18
Data Sheet P11074EJ3V0DS00
PC8110GR
TEST CIRCUIT
1000 pF 100 pF 0.22 F
33 pF 1 LOin 51 2 3 33 pF 4 Qin Qin Iin Iin 5 6 7 8 9 10 17 16 15 14 13 12 11 33 pF RFout Vps 20 19 18
VCC1 VCC2
0.22 F 100 pF 1000 pF
Data Sheet P11074EJ3V0DS00
19
PC8110GR
MEASUREMENT BLOCK DIAGRAM 1 (RF Output Power, Local Carrier Leak, Image Rejection, I/Q 3rd Order Intermodulation Distortion and Power Save Rise and Fall Time)
Voltage Source
Signal Generator
Pulse pattern Generator
Voltage Source 1000 pF 33 pF 1 LOin 51 33 pF Qin Qin Iin Iin 2 3 4 5 6 7 8 9 Q Qb Ib I 10 20 19 18 17 16 15 14 13 12 11 33 pF RFout 0.22 F 100 pF 1000 pF Vps VCC1 VCC2 100 pF 0.22 F
I/Q Signal Generator
Spectrum Analyzer
20
Data Sheet P11074EJ3V0DS00
PC8110GR
MEASUREMENT BLOCK DIAGRAM 2 (Local Input VSWR and RF Output VSWR)
Network Analyzer Voltage Source
Voltage Source 1000 pF 33 pF 1 LOin Voltage Source 51 33 pF Qin Qin Iin Iin 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 33 pF RFout 0.22 F 100 pF 1000 pF Vps VCC1 VCC2 100 pF 0.22 F
Network Analyzer
Data Sheet P11074EJ3V0DS00
21
PC8110GR
TEST BOARD
Bypass Capacitor VPS Short RFout VCC2 Bypass Capacitor 33 pF VCC1
PC8110GR
LOin 33 pF 51
33 pF
Qin
Iin
Qin
Iin
Notes 1. Double-sided patterning with 35 m thick copper on polyhimid board sizing 50 x 50 x 0.4 mm. 2. GND pattern on backside. 3. Solder coating over patterns. 4. {, indicate through-holes.
22
Data Sheet P11074EJ3V0DS00
PC8110GR
PACKAGE DIMENSIONS
20 PIN PLASTIC SSOP (225 mil) (UNIT: mm)
20 11
detail of lead end
3-3
+7
1 6.7 0.3
10
1.8 MAX. 1.5 0.1
6.4 0.2 4.4 0.1 1.0 0.2
0.5 0.2 0.65 0.22 -0.05 0.1 0.1
+0.10
0.15 0.10 M
0.15 0.575 MAX.
+0.10 -0.05
NOTE
Each lead centerline is located within 0.10 mm of its true position (T.P.) at maximum material condition.
Data Sheet P11074EJ3V0DS00
23
PC8110GR
NOTE ON CORRECT USE (1) Observe precautions for handling because of electrostatic sensitive devices. (2) Form a ground pattern as wide as possible to keep the minimum ground impedance (to prevent undesired oscillation). (3) Keep the track length of the ground pins as short as possible. (4) Connect a bypass capacitor (e.x. 1 000 pF) to the VCC pin. (5) I, Q DC offset voltage should be same as the I, Q DC offset voltage (to prevent changing the local leak level with power save control.) RECOMMENDED SOLDERING CONDITIONS This product should be soldered in the following recommended conditions. Other soldering method and conditions than the recommended conditions are to be consulted with our sales representatives.
PC8110GR
Soldering process Infrared ray reflow Soldering conditions Peak package's surface temperature: 235 C or below, Reflow time: 30 seconds or below (210 C or higher), Note Number of reflow process: 3, Exposure limit : None Peak package's surface temperature: 215 C or below, Reflow time: 40 seconds or below (200 C or higher), Note Number of reflow process: 3, Exposure limit : None Solder temperature: 260 C or below, Flow time: 10 seconds or below, Note Number of flow process: 1, Exposure limit : None Terminal temperature: 300 C or below, Flow time: 3 seconds/pin or below, Note Exposure limit : None Symbol IR35-00-3
VPS
VP15-00-3
Wave soldering
WS60-00-1
Partial heating method
Note Exposure limit before soldering after dry-pack package is opened. Storage conditions: 25 C and relative humidity at 65 % or less. Caution Apply only a single process at once, except for "Partial heating method".
For details of recommended soldering conditions for surface mounting, refer to information document SEMICONDUCTOR DEVICE MOUNTING TECHNOLOGY MANUAL (C10535E).
24
Data Sheet P11074EJ3V0DS00
PC8110GR
[MEMO]
Data Sheet P11074EJ3V0DS00
25
PC8110GR
[MEMO]
26
Data Sheet P11074EJ3V0DS00
PC8110GR
[MEMO]
Data Sheet P11074EJ3V0DS00
27
PC8110GR
* The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. * No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this document. * NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Corporation or others. * Descriptions of circuits, software, and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. The incorporation of these circuits, software, and information in the design of the customer's equipment shall be done under the full responsibility of the customer. NEC Corporation assumes no responsibility for any losses incurred by the customer or third parties arising from the use of these circuits, software, and information. * While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features. * NEC devices are classified into the following three quality grades: "Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a customer designated "quality assurance program" for a specific application. The recommended applications of a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device before using it in a particular application. Standard: Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) Specific: Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books. If customers intend to use NEC devices for applications other than those specified for Standard quality grade, they should contact an NEC sales representative in advance.
M7 98. 8

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